ASIC Tamagotchi, a TinyTapeout Project

For my TinyTapeout 4 personal project, I designed an ASIC Tamagotchi that lives on the chip. Given the limited space available, this Tamagotchi is simple but functional. It is also an excellent starting point for learning ASIC design and explores interesting concepts such as implementing UART serial communication and generating pseudo-random numbers, which I mentioned in a previous post. About the Tamagotchi The Tamagotchi design is very simple. It consists of a small memory that stores ASCII characters so the Tamagotchi can be rendered graphically in the serial console....

October 7, 2024 · 3 min · Fabian Alvarez

A Novel Approach to RISC-V Implementation on FPGAs

Introduction The RISC-V instruction set architecture has gained significant traction in recent years due to its open-source nature and flexibility. This paper explores novel implementation strategies for RISC-V processors on FPGA platforms. Related Work Previous implementations of RISC-V on FPGAs have focused primarily on… Methodology Our approach consists of three main components: Optimized Register File: We redesigned the register bank to reduce latency Efficient Control Unit: A new FSM-based control unit Pipeline Optimization: Careful balancing of pipeline stages Register File Design The register file implementation uses dual-port memory…...

January 15, 2024 · 1 min · Fabian Alvarez